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Technologies

A New Approach to Computation Reimagines Artificial Intelligence

Explore how memory-centered computing brings AI processing closer to data, reducing movement, energy use, and latency while revealing key hardware trade-offs.

By Susan Kelly

Why AI Needs a Different Computing Model

When an AI system recognizes an image, generates text, or predicts demand, it performs enormous numbers of simple calculations. The difficulty is not always the calculations themselves. Conventional computers repeatedly move data between memory and processing units, and that movement consumes time and energy. As AI models grow, the cost of shuttling weights and intermediate results can rival or exceed the cost of arithmetic.

A different computing model tries to reduce this separation by placing processing closer to where information is stored, or by organizing hardware around the patterns of AI workloads. That could lower delays, energy use, and operating costs, especially in systems handling large models continuously. It is not a universal replacement for existing processors, however. Benefits depend on software support, data-access patterns, manufacturing complexity, and whether the workload can use the hardware efficiently.

The Bottleneck Is Often Moving Data

The Bottleneck Is Often Moving Data

Consider a simple AI task: multiplying a long list of model weights by incoming data. The processor may finish each operation quickly, yet much of the system’s time is spent fetching those weights from memory, carrying them across connections, and storing the results again. This resembles a worker who spends more time walking to a warehouse than using the tools inside it. Every trip also uses electricity, and repeated trips multiply as models process millions of requests.

This creates a bottleneck that is easy to miss when attention stays focused on processor speed. Faster arithmetic does not automatically make the whole system faster if memory access and communication remain slow. Keeping data closer to the computing elements can reduce those transfers, but it introduces trade-offs. Nearby memory may be smaller, less flexible, or more expensive to manufacture, while distributing computation can make programming and coordination harder. The practical question is therefore not simply how many calculations a chip can perform, but how efficiently it can supply those calculations with the right data.

Computation Moves Closer to the Information

One way to address this bottleneck is to place small processing elements beside memory rather than sending every value to a distant central processor. In a conventional design, memory mainly stores information and the processor mainly transforms it. In a closer arrangement, memory and computation work as a local pair, handling more operations before results travel across the chip or between components.

This idea appears in several forms. Near-memory computing places processors next to memory banks, while in-memory computing performs certain operations within the memory structure itself. Some designs also stack memory and logic in layers, shortening the distance that data must travel. For AI, these arrangements can be useful because many workloads repeat the same operations across large arrays of weights and inputs. The hardware can perform those operations in parallel, reducing transfers and potentially improving energy efficiency.

Specialized memory may support only certain calculations, and converting an existing AI model to use it can require new software and data layouts. The gain comes when the workload matches the hardware, not simply because the components are physically closer.

What This Changes for Artificial Intelligence

What This Changes for Artificial Intelligence

For artificial intelligence, the most immediate change could be practical rather than dramatic: more work may happen with less energy and lower delay. An AI service answering requests, scanning medical images, or monitoring factory equipment often repeats similar calculations at high volume. If the hardware keeps frequently used model data nearby, it may respond faster and reduce the electricity required for each result. That matters in data centers, but also in phones, vehicles, cameras, and other devices that cannot rely on a constant cloud connection.

This approach may also make some AI tasks feasible in places where conventional hardware is too power-hungry or slow. However, it does not automatically make models more capable. Large language models still require substantial memory, training remains expensive, and specialized hardware may struggle with irregular tasks or rapidly changing algorithms. A design optimized for multiplying arrays of numbers may be excellent for one neural-network layer but less useful for general-purpose software. The likely outcome is a more varied AI hardware landscape, where conventional processors handle flexible work while memory-centered systems accelerate predictable, repeated operations.

Performance Gains Depend on the Right Workloads

A memory-centered design is most useful when an AI task performs the same kind of operation repeatedly on large, well-organized data. Image recognition, recommendation systems, and parts of language-model inference often fit this pattern: the hardware applies similar mathematical steps to many values, while reusing model weights. Parallel processing can then reduce data movement and keep many computing elements busy.

The advantage is smaller when the workload changes direction frequently or depends on complicated decisions. A model with irregular memory access, constantly changing data, or layers that require different operations may leave specialized hardware underused. Training can also be harder than inference because it updates model weights, stores more intermediate results, and demands greater flexibility. In such cases, transferring work between specialized accelerators and conventional processors can erase some of the expected gains.

That makes benchmark results easy to overinterpret. A system may show impressive speed or energy savings on one carefully chosen task without delivering the same improvement across an AI service. Real performance depends on the entire system, including software, memory capacity, communication overhead, and utilization. The promising question is not whether this hardware is universally faster, but where its narrow strengths align with repeated, high-volume AI work.

The Engineering Obstacles Still Matter

Making these systems work outside a laboratory brings several engineering problems into view. Specialized memory and tightly connected processing elements can be difficult to manufacture, especially when they must be stacked or built with unusual materials. Heat is another constraint: concentrating many operations near memory may reduce data transfers but still produce substantial local heat that must be removed. Manufacturing defects, limited chip space, and lower production volumes can also make these designs more expensive than established processors.

Software presents an equally important obstacle. AI models must be divided, scheduled, and stored in ways that match the hardware’s layout. Existing tools may not support those choices, forcing engineers to rewrite compilers, libraries, and parts of the model. Updates can become slower if a design is tuned for one architecture or numerical format. Communication between specialized accelerators and general-purpose processors can add further delay. These costs do not make the approach impractical, but they mean adoption will likely begin with stable, high-volume tasks where energy savings and throughput justify the effort.

A Shift in How We Think About AI Hardware

When evaluating new AI hardware, the useful question is not simply whether it replaces a faster processor. It is whether the design reduces a costly part of the workload that conventional systems handle inefficiently. Bringing computation closer to memory may lower energy use and delay for repeated, predictable operations, but the benefits depend on software, manufacturing, and sustained utilization. A specialized chip can look impressive in a benchmark yet deliver little value if a real application spends much of its time moving between different systems.

AI hardware will likely be judged by fit rather than by one universal speed ranking. Conventional processors, GPUs, and memory-centered accelerators may work together, each handling the tasks it suits best. The promise is practical, but selective—not a replacement for computing as we know it.

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